ITSC 3181 Schedule, Topics, Lecture Notes and Assignments

Week Date Week day Lecture Lab Lecture/Lab Notes Textbook Reading and Study Topics Homework Additional Materials
1 1/10/2023 Tuesday 1 Syllabus Intro, Chapter 1 - Computer Abstraction and Tech - Intro, Great Ideas and Components Syllabus, and Chapter 1.1 - 1.4
1/11/2023 Wednesday 1 Lab 01: Linux and Compiling a program for its assembly output, 1%, Due 01/18 Basic Linux commands and compilation
1/12/2023 Thursday 2 Chapter 1 - Computer Abstraction and Tech - Performance and Power 1.5 - 1.7, and DDCA 1.4 Number Systems Homework 1, Due 01/27, 4%
2 1/17/2023 Tuesday 3 C Basics, Number Systems, Memory and Binary Systems C Programming, 2.12
1/18/2023 Wednesday 2 Lab 02: C Pointers, array and memory, 3%, Due 01/25
1/19/2023 Thursday 4 Compilation, Assembling, Linking and Program Execution 2.12
3 1/24/2023 Tuesday 5 Chapter 1 - Computer Abstraction and Tech -- Multiprocessing and Benchmarking 1.8 - 1.10
1/25/2023 Wednesday 3 Lab 03: Basic C programming and performance with sum, 1%, Due 02/01 swap example, sum example, perf, PAPI
1/26/2023 Thursday 6 Chapter 2 - Instructions - Intro, Operations, and Operands 2.1 - 2.3 Homework 2, due 02/09, 5% Slides for RISC-V ISA, Info for RISC-V Assembly Programming, RISC-V ISA Reference Card
4 1/31/2023 Tuesday 7 Chapter 2 - Instructions - Numbers and Encoding 2.4 - 2.5
2/1/2023 Wednesday 4 Lab 04/05: RISC-V assembly programming with RARS simulator #1, 3%, Due 09/22. Video for Introducing RARS RARS -- RISC-V Assembler and Runtime Simulator
2/2/2023 Thursday 8 Chapter 2 - Instructions - Logic and Branch Instructions 2.6 - 2.7
5 2/7/2023 Tuesday 9 Chapter 2 - Instructions - Logic and Branch Instructions 2.6 - 2.7
2/8/2023 Wednesday 5 Lab 04/05: RISC-V assembly programming with RARS simulator, #2, 3%, Due 02/10 RARS -- RISC-V Assembler and Runtime Simulator
2/9/2023 Thursday 10 Chapter 2 - Instructions - Call/Return Instructions, String, Addressing Mode 2.8, 2.9, 2.10
6 2/14/2023 Tuesday Test 1, Covered Topics, Midterm 1 Sample Questions, 10%
2/15/2023 Wednesday 6 Lab 06: Instruction Encoding and Decoding, Due 02/23 2%
2/16/2023 Thursday 11 Chapter 2 - Instructions - Sort Example, and Pointer, MIPS and X86 and Conclusion, and Instruction Encoding and Decoding, Branch Instruction Encoding and Decoding 2.13, 2.14 (and Array/pointer lecture), 2.16, 2.17, 2.20, 2.5 and 2.10 for encoding and decoding, Homework 3, due by 03/07, 5%
7 2/21/2023 Tuesday 12 Appendix A - Basics of Logic Design - Intro, Truth Table, Logic Equation and Logic Gates A.1 - A.2
2/22/2023 Wednesday 6 Lab 06: Instruction Encoding and Decoding, Due 02/23 2%
2/23/2023 Thursday 13 Appendix A - Basics of Logic Design - Combinational Logic A.3
8 2/28/2023 Tuesday Student Recess
3/1/2023 Wednesday Student Recess
3/2/2023 Thursday Student Recess
9 3/7/2023 Tuesday 14 Appendix A - Basics of Logic Design - Design an ALU A.5
3/8/2023 Wednesday 7 Lab 07: Logic Design: Intro, Mux, and Decoder, Due 03/15, 1%
3/9/2023 Thursday Test 2 (Questions will be based on Test 1 and HW3), 12%
10 3/14/2023 Tuesday 15 Appendix A - Basics of Logic Design - Clocks and Registers A.7 - A.8
3/15/2023 Wednesday 8 Lab 08: Logic Design: ALU, Due 03/22 1%
3/16/2023 Thursday 16 Appendix A - Basics of Logic Design - Memory (SRAMs and DRAMs); Appendix A - Basics of Logic Design - Finite State Machines, Timing and Conclusion A.9; A.10 and A.11
11 3/21/2023 Tuesday 17 Chapter 4 - The Processor - Logic Design and Datapath, The PPT file that has animation. 4.1 - 4.3 Homework 4, due 04/04, Excel answer sheet for HW4, 5%
3/22/2023 Wednesday 9 Lab 09: Logic Design: Register file, Due 03/29, 1%
3/23/2023 Thursday 18 Chapter 4 - The Processor - Single-cycle Implementation 4.4 - 4.5
12 3/28/2023 Tuesday 19 Chapter 4 - The Processor - Pipeline Overview 4.6 - 4.9
3/29/2023 Wednesday 10 Lab 10: Logic Design: Memory Module, Due 04/05, 1%
3/30/2023 Thursday 20 Chapter 4 - The Processor - Pipeline Overview 4.6 - 4.9
13 4/4/2023 Tuesday 21 Chapter 4 - The Processor - Pipeline Implementation, Chapter 4 - The Processor - Instruction Level Parallelism and Conclusion 4.10 - 4.12, 4.15
4/5/2023 Wednesday 11 Lab 11/12: Processor: Single-Cycle CPU Design, Due 04/12 3%
4/6/2023 Thursday Test 3 (Questions will be based on Test 2 and HW4) 12%
14 4/11/2023 Tuesday 22 Chapter 5 - Memory Hierarchy -- Introduction and Memory Technologies 5.1 - 5.2 Homework 5, due 04/25, 5%
4/12/2023 Wednesday 12 Lab 11/12: Processor: Single-Cycle CPU Design, Due 04/12, 3%
4/13/2023 Thursday 23 Chapter 5 - Memory Hierarchy -- Cache Basics 5.3 - 5.4
15 4/18/2023 Tuesday 24 Chapter 5 - Memory Hierarchy -- Cache Basics 5.3 - 5.4
4/19/2023 Wednesday 13 Lab 13/14 - Memory Hierarchy -- Stride Access and Loop Ordering with Matrix Multiplication, matrixMultiply.c, Excel answer sheet, Submission template file. 3%, Due 04/26
4/20/2023 Thursday 25 Chapter 5 - Memory Hierarchy -- Cache Performance 5.3 - 5.4
16 4/25/2023 Tuesday 25 Chapter 5 - Memory Hierarchy -- Cache Performance 5.3 - 5.4
4/26/2023 Wednesday 14 Lab 13/14 - Memory Hierarchy -- Stride Access and Loop Ordering with Matrix Multiplication, Due 04/26
4/27/2023 Thursday 26 Chapter 5 - Memory Hierarchy -- Virtual Memory and Conclusion 5.7 and 5.16
17 5/2/2023 Tuesday 27 Chapter 5 - Memory Hierarchy -- Virtual Memory and Conclusion 5.7 and 5.16
5/3/2023 Wednesday Reading Day
5/4/2023 Thursday
18 5/9/2023 Final Exam 11:00 - 1:30PM 26%